Analysis of Embedded MCU Hardware Design Scheme

1 Introduction

At present, the embedded technology of integrated circuits is developing faster and faster, and embedded products of various colors are also becoming more and more popular. In particular, they are typically represented by large-screen, multi-functional mobile phones and tablet computers, and are used as the core of their control. Low-power microcontrollers (MCUs) play a decisive role. Therefore, the design of the CPU as the core MCU has also become a mainstream development direction for many universities and major companies to compete in the market.

2 MCU selection technology

Microcontrollers (MCUs) have a wide range of applications, such as mobile phones, cameras, camcorders, MP3s, MP4s, tablet computers, notebook computers, PCs, and various remote-controlled electric toys in the consumer electronics market, as well as automotive electronics. Electronic keys, control systems, navigation, reversing images, reversing radar, etc., as well as various security defense systems, medical equipment, industrial control, weapons and equipment, aerospace and other fields. Therefore, a clear market positioning is required before designing the MCU, so that the target product can be targeted, and high-performance, low-cost, multi-functional, light-weight, low power consumption, high reliability, good heat dissipation, anti-irradiation, anti-single-particle, It is very competitive in terms of adapting to high temperature and ultra-low temperature. The MCU hardware design mainly includes two major parts: CPU selection and selection of peripheral IP cores.

3 CPU selection

As the brain of the MCU, the CPU functions as a control core and basically determines the target application field of the MCU. Therefore, the selection of the CPU is the key to designing the MCU. At present, the CPUs that can be used for integrated circuit embedded design mainly include the 80386EX of the CISC architecture, and the ARM7TDMI/EJ, ARM926EJS/946ES/968ES, ARM1136/56/76, and ARM Cortex-A5/7/8/9/15 of the RISC architecture. ARM Cortex-R4/5/7, ARM Cortex-M0/0+/1/3/4, SecurCore000/100/300, MIPS32M4K/4K/14K/24K/34K/74K/1004K/1074K, microMIPS32, SmartMIPS, Nios/NiosII , PowerPC40x/60x/70x/90x, SPARCv7/8/9, LEON2/3/4, OR1000/1200, etc. Among them, the ARM series embedded CPU has the most rapid development momentum, occupying most of the embedded processor market Shares, but also continue to grow. Each processor in each company has its own characteristics that can meet different application needs. In addition, the completeness of the development environment, the efficiency of the bus interface protocol, the professionalism of technical support, the richness of IP core types, the openness of design resources, and the use habits of designers all make a decisive difference in the selection of CPUs. influences.

4 Peripheral IP selection

For the application field, the peripheral IP core plays a very good supporting role, because if the MCU is compared to "people", the peripheral IP core is equivalent to the MCU "eye" "ear" "mouth" "nasal" and other important organs Therefore, the selection of peripheral IP cores is equally important. The selection of IP core includes general IP core and specific purpose IP core.

4.1 General IP Selection

At present, there are many kinds of general-purpose IP cores. According to the bus interface protocol, they can be divided into IBM's Core Connect, ARM's AMBA (Advanced Microcontroller Bus Architecture) and Silicore Corp's Wishbone, etc.; they are classified into IP cores according to their functions. DMA, GPIO, UART, USART, TImer, WDT, I2C, I2S, SPI, CAN, memory controllers, image processing IP cores, etc.; memory IP cores such as ROM, RAM, SRAM, FLASH, etc. According to different functions, different choices can be made, and several IP cores with the same function can also be integrated. For example, UARTx4 has four UART interfaces, and I2Cx2 has two I2C interfaces.

4.2 Specific Use IP Selection

There are also many types of IP cores for specific functions, such as clock-like PLLs, on-chip high-precision oscillators, analog-to-digital conversion AD, DA, network-based ETHERNET MAC/PHY, modems, image processing H.264, JPEG, and interfaces. USB2.0/3.0, IDE, SATA, etc. of the class, LVDS, RapidIO, SerDes, etc. of the high-speed interface class, as well as various sensors, etc., need to be determined according to market positioning.

5 MCU Design 5.1 Hardware Design

Currently, large companies such as Samsung, FreeScale, Atmel, NXP, TI, and ST have launched large-scale MCUs of various types, and each has its own characteristics. Therefore, designing MCUs with independent intellectual property rights should be different from these large companies in system architecture and other aspects. One is to avoid infringement and the other is to facilitate market competition. At the same time, product planning should be done: From simple to complex, from a single product to a series of products, the design platform is constantly maintained and updated, and the design software is constantly maintained and upgraded, and the level of the design personnel is continuously improved. It mainly includes the following aspects:

(1) Architecture Analysis, Design, and Verification

According to the performance specifications and functional specifications in the design specifications, the first need to develop a design proposal: select several CPUs and all used IP cores for system-level design, and overall evaluate the MCU system architecture, CPU performance indicators, IP cores The functional characteristics and other aspects. Based on several selected target processes, the corresponding data analysis is given to confirm whether it can meet the requirements of the design goals, so as to determine the basic design plan, and then perform corresponding optimization based on the specific design results.

(2) Clock and reset scheme design

Clocks and resets play a crucial role in the entire circuit. If there is a problem with these two signals, the circuit will not work properly. Therefore, an elaborate clocking scheme and reset scheme are needed. Different peripherals need to be provided with different clocks: a USB single clock, a high-speed peripheral such as a CPU clock, and a low-speed peripheral such as a UART, as shown in FIG. 1.

Analysis of Embedded MCU Hardware Design Scheme

Figure 1 clock scheme diagram

(3) Bus Design

Which kind of bus, what kind of combination, the number of buses, etc., are related to the performance of the MCU. Taking the AMBA bus as an example, the usual usage is AHB to connect high-speed peripherals, and then access low-speed peripherals through the AHB to APB bus bridge. Sometimes in order to improve the access speed of peripherals, there may be two APB buses inside one MCU; there may also be two AHB buses. Separate instructions and data, one for data transmission or image processing, and the other for general control. There may also be a multi-layered AHB interconnect matrix that allows multiple Masters to access multiple, different high-speed peripherals at the same time, significantly improving MCU system performance. Therefore, the formulation of the bus scheme must be determined based on the specific application of the product.

(4) Design of power management scheme

Low power consumption is one of the prominent features of the MCU, because a variety of low-power management strategies are integrated in the MCU: not only logic-based clocks, gate-level optimization, but also physical multi-threshold voltages are used. Power domain, gated power, and other modes; at the same time, multiple modes are used in the functional mode: normal operation mode, sleep mode, deep sleep mode, power-down mode, etc., and strict regulations governing the operation and shutdown of IP cores in various modes. Type and entry and exit procedures between various models. This not only guarantees the function of the circuit but also guarantees the performance of the circuit.

(5) Design of interrupt processing plan

Interrupt is a very important function of MCU. Through interrupt control, the CPU can quickly respond to peripheral requests. Interrupt processing generally includes the number of interrupt sources, priority, whether it can be masked, whether it is a general interrupt or a fast interrupt. Usually, a special module needs to be designed to perform interrupt processing. Sometimes in order to improve design efficiency, IP vendors also provide standard IP cores based on bus interface protocols such as AHB or APB. If such an IP core can meet the system's requirements for interrupt handling, it can also be used.

(6) Design of memory management scheme

Memory is a large area of ​​the MCU module. An MCU may contain three types of memory: ROM, SRAM, and FLASH. The ROM is used to store the Boot Loader, IP Drivers, etc. The SRAM is used to increase the speed of the software, store temporary data, and the FLASH is used to store application programs and data. Since the read/write speed of the FLASH is relatively slow, in order to increase the read/write speed of the FLASH, a pre-fetch buffer and a write buffer may be used to speed up the buffering of instructions and data. Since each memory has its own address space, it is convenient for user access. In order to facilitate system management, a memory management module is usually designed, and a corresponding control register is designed in the system control module.

(7) Online debugging program design

At present, the more commonly used on-line debugging methods are serial debugging, such as JTAG, EJTAG, and UART. Using the PC's parallel port, serial port, network port, or USB interface makes on-line debugging simple and convenient, and the cost is low, as shown in Figure 2. . Since the program to be debugged is to be run on the target board and the MCU must work normally, a special debug module needs to be designed to ensure that the upper computer software can call the CPU to perform on-line debugging of hardware and software, and meet the IEEE1149.1 protocol standard. The basic structure of this module is shown in Figure 3.

Analysis of Embedded MCU Hardware Design Scheme

Figure 2 Typical in-circuit debugging system

Analysis of Embedded MCU Hardware Design Scheme

Figure 3 Debugging Structure

(8) Test plan design

The MCU test program mainly includes several parts of physical testing, functional testing and performance testing. First, according to the clock scheme and the reset scheme, the MCU is clocked to ensure that the clock circuit is working properly; then the CPU is tested for the function, because the CPU is the control core of the MCU, and only if the CPU operates correctly can other cores be tested; and then The design specification performs functional tests and performance tests on the digital IP core and analog IP core on the periphery of the MCU.

5.2 System-level verification

In order to ensure the correctness of the design, the MCU must be fully functional verified before tapeout. Therefore, a variety of IIPs and VIPs need to be used to build a system-level verification platform. Detailed verification schemes are formulated according to the design specifications, and simulation tools are used to adopt directional and random methods or adopt more popular verification methods such as OVM, VMM, and UVM. It is correct to verify all the functions of the MCU one by one, and focus on the non-standard modules that are custom designed for system functions such as system control unit, bus arbiter, and power management.

5.3 FPGA Prototyping

Because system-level verification uses EDA tools for software simulation, the simulation speed is slow. Therefore, FPGA prototype verification can be used to accelerate the system-level verification. In particular, the need to download those modules with complex functions and large scales is a must. Go to the FPGA, and you should use a larger FPGA as much as possible, such as Virtex-7 series, ArriaV series and so on. When building an FPGA verification platform, not only one FPGA, but also multiple FPGAs can be used. It is best to download all the modules of the design to the FPGA. FPGA prototyping not only verifies the correctness of the hardware, but also verifies the correctness of the IP core driver. It also verifies the correctness of the target application.

5.4 Physical Design

After MCU system-level verification and FPGA prototype verification, physical design is needed: designing reasonable design constraints according to design specifications, from logic synthesis to automatic placement and routing, to physical verification, formal verification, static timing analysis, and functional verification. From the RTL to GDSII conversion process, the data is finally sent to the foundry for processing.

5.5 Document Design

The documentation is an important and necessary part of the MCU design process. The document design to be completed at this stage should be specified in the form of a template at different stages of the design process. The project manager should conduct a detailed review to ensure that once the design is in progress. If any problem arises, the relevant design documents and corresponding design documents can be found. In particular, the details of the design need to be fully reflected.

6 Conclusion

The above is only a brief overview of the main aspects of the MCU hardware design. To design a cost-effective and competitive MCU, a lot of detailed work is needed, especially the full-featured verification and detailed testing of the circuit, and build an MCU platform to develop the series of products to ensure that the products can be Continuous access to the embedded market.

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